Pentium 4 Extreme Edition announced

[Asher]

http://www.anandtech.com/IT/showdoc.html?i=1870

3.2GHz, 512KB L2 cache, 800MHz systembus, and 2MB of on-die L3 cache. This ain't no Apple "L3 cache" bull****, but the real deal -- same cache used in the Gallatin Xeons.

The 2MB on-die L3 cache takes the Northwood's 55 million transistors and balloons it to an incredible 108 million transistors, which is still less than the Prescott's 125 million transistors. What's important to note here is that although the Prescott has less than half of the cache of this new Pentium 4, it still has more transistors - giving you some insight into how much Intel enhanced the core. We will have some benchmarking time with the Extreme Edition very soon...

Aii. It's an obvious placeholder while Prescott is prepared for October 26th, since Athlon 64s launch September 22nd.

[mrmitchell]

Is it really named "Extreme"?

Honestly, "Extreme" marketing pushers can shove it. I'm sick and tired of everything from my Jello to my computer being Extreme. Where are all the products branded "Ordinary" or "Sub-par"? Is EVERYTHING extreme? It's a FRIGGING COMPUTER PROCESSOR DAMNIT!!!

Is "extreme" supposed to be related to extreme sports or something? Well, then, I'm sure Extreme skateboarders are soiling their underwear at this Extreme CPU.

Agh...

For the actual processor though? I don't care. Sorry.

[MichaeltheGreat]

I'd rather see the cache expanded on the L2 side.

[Asher]

Prescott will be 1MB L2.

[Urban Ranger]

L3 cache is of dubious value.

[PLATO]

Okay, I'm stupid...what are the L2 and L3 caches and what function do they serve?

[Sava]

And the equally performing Athlon equivalent will cost $100 less.

[Victor Galis]

So, I guess Oct. 26 is the day to build a new computer for me

[Dinner]

Wait a few weeks and prices will drop like a rock as the new processors are released at the rate of one per month for the next two months.

[Asher]

Originally posted by Urban Ranger
L3 cache is of dubious value.

On-die, high-bandwidth, low-latency caches are not.

Off-die L3 caches are questionable, RAM L3-caches like Apples are downright pathetic.

Okay, I'm stupid...what are the L2 and L3 caches and what function do they serve?

The CPUs work by fetching information from system memory, computing, then storing them again. Caches are very very fast pools of memory that are many thousands of times faster than system RAM.

When the CPU needs data, it'll first search the L1 cache (which is very fast but very small), and if that fails, the L2 cache (which is slower than L1 but still very fast, and much larger). If the L2 fails, it'll go to the L3 cache (even larger but slower than L2, but still very fast), and finally to the system RAM.

An analogy is you're working on your desk with three rings of stuff nearby. The ring of stuff closest to you is L1, the next ring is L2, the next ring is L3. Stuff on the bookshelf on the other side of the house is system RAM, and stuff snail-mailed from Portugal is your hard disk.

[Asher]

Originally posted by Sava
And the equally performing Athlon equivalent will cost $100 less.

Look at the current situation: Equally performing Athlons are more expensive than Pentium 4s.

The Athlon 64s and Pentium 4EEs will both be quite expensive. The bottom of the line Athlon 64 is $400US, IIRC. And that's a castrated single-channel version.

[Sava]

well.... YOU SMELL AND BILL GATES EATS POO

[Alexander's Horse]

Originally posted by mrmitchell
Where are all the products branded "Ordinary" or "Sub-par"?

That would be the comp on my desk at home

[Urban Ranger]

Originally posted by Asher
On-die, high-bandwidth, low-latency caches are not.

Off-die L3 caches are questionable, RAM L3-caches like Apples are downright pathetic.

The question is, how much will the L3 help when a branch prediction fails and the pipeline gets thrashed? For P4, you're screwed no matter what when the pipeline is emptied and the execution starts over at the other leg. For CPUs with shorter pipes, it's not that bad.

Another thing is, now that main memory is getting faster, how much of a gain do you get by having a L3 cache? Remember, it's still CMOS, and CMOS is not that fast. ECL is much faster, but also a lot hotter.

[PLATO]

Thanks Asher. UR...what does that mean in English?